TC1796
System Units (Vol. 1 of 2)
CPU Subsystem
User’s Manual 2-36 V2.0, 2007-07
CPU, V2.0
The DMI control register indicates the DMI data memory size and data cache availability.
DMI_CON
DMI Control Register (F87FFC10
H
) Reset Value: 0000 0070
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
1514131211109876543210
0DMEMSZ0DCSZ
rrhrrh
Field Bits Type Description
DCSZ [1:0] r Data Cache Size
This bit field indicates the DMI data cache
configuration.
In the TC1796 no data cache is available, therefore
DCSZ is always read as 00
B
.
00
B
No cache available
DMEMSZ [6:4] r Data Memory Size
This bit field indicates the DMI data memory size.
In the TC1796 DMEMSZ is always read as 111
B
.
111
B
64 Kbyte DMI data memory
0 [3:2],
[31:7]
r Reserved
Returns 0 when read.
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