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Infineon Technologies TC1796 - Page 1483

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
Controller Area Network (MultiCAN) Controller
User’s Manual 22-188 V2.0, 2007-07
MultiCAN, V2.0
MSRCIE 9rwMaster Slave Relation Change Interrupt Enable
MSRSCIE enables the master slave relation change
interrupt. This interrupt is generated when bit field
TTSR.MSRC changes its state.
0
B
Master slave relation change interrupt is
disabled.
1
B
Master slave relation change interrupt is
enabled.
Bit field TTINPR.NOTIFINP selects the interrupt
output line that becomes activated at this type of
interrupt.
SYNCSCIE 10 rw Synchronization State Change Interrupt Enable
SYNCSCIE enables the synchronization state
change interrupt. This interrupt is generated when bit
field TTSR.SYNCSC changes its state.
0
B
Synchronization state change interrupt is
disabled.
1
B
Synchronization state change interrupt is
enabled.
Bit field TTINPR.NOTIFINP selects the interrupt
output line that becomes activated at this type of
interrupt.
SEIE 11 rw Scheduler Error Interrupt Enable
SEIE enables the scheduler error interrupt. This
interrupt is generated whenever bits EOS or SERR1
or SERR2 or CFGERR of register TTSR are set by
hardware.
0
B
Scheduler error interrupt generation is
disabled.
1
B
Scheduler error interrupt generation is
enabled.
Bit field TTINPR.ERRINP selects the interrupt output
line that becomes activated at this type of interrupt.
Field Bits Type Description

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