Infineon Technologies TC1796 - Page 1542

TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-33 V2.0, 2007-07
MLI, V2.0
Figure 23-26 Read Frame and Answer Frame Flow
Normal Frame
Received Event
MCA05891_mod
Transmitting MLI Controller Receiving MLI Controller
MLI Transmitter Ready
Read access to Transfer
Window x (Offset, Width)
TPxAOFR.AOFF := Offset
TPxSTATR.DW := Width
TRSTATR.DVx := 1
TRSTATR.RPx := 1
RCR.DW := Width
TSTATR.APN := x
RCR.TF := 01
B
RISR.NFRI := 1
MLI Receiver Ready
Pipe x initialized
TRSTATR.DVx := 0
TISR.NFSIx := 1
TREADY = 1
Send "Discrete Read
Frame" of pipe x
TRSTATR.AV := 0
TREADY = 1
RDATAR.DATA := Read Data
RCR.DW := Width
RCR.TF := 11
B
TRSTATR.RPx := 0
RISR.NFRI := 1
Address Prediction:
Calculate TPxSTATR.AP
and TPxSTATR.OP
TPxSTATR.OP = 0 ?
TCR.NO = 1 ?
yes
yes
no
no
Parity check & acknowledge frame
Parity check & acknowledge frame
Send "Optimized Read
Frame" of pipe x
Normal Frame
Received Event
Read Data from Remote Window
(see separate figure)
Send "Answer
Frame" of pipe x
Normal Frame
Sent Event
RADRR.ADDR, RPxBAR.ADDR :=
RPxBAR modified by Offset
Parity check & acknowledge frame
RADRR.ADDR, RPxBAR.ADDR :=
RPxBAR.ADDR + RPxSTATR.AP