TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-99 V2.0, 2007-07
MLI, V2.0
The Transmitter Receiver Status Register TRSTATR contains read-only flags that
indicate the status of MLI operations.
TRSTATR
Transmitter Receiver Status Register
(2C
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0 PN RP3 RP2 RP1 RP0 DV3 DV2 DV1 DV0
r rh rhrhrhrhrhrhrhrh
1514131211109876543210
0 BAV AV CV3 CV2 CV1 CV0 0
r rhrhrhrhrhrh r
Field Bits Type Description
CVx
(x = 0-3)
4 + x rh Command Valid
Bit is set by hardware when a TCMDR.CMDPx bit field
is written. It is cleared by hardware when the Command
Frame has been correctly transmitted. CVx can be set
or cleared by software via bits SCR.SCVx or
SCR.CCVx.
AV 8rhAnswer Valid
Bit is set by hardware when the TDRAR register in the
the MLI transmitter (in the Remote Controller) is
written. AV is cleared by hardware when the Answer
Frame has been correctly sent. AV can be cleared by
software via bit SCR.CAV.
BAV 9rhBase Address Valid
Bit is set by hardware when the TCBAR register in the
MLI transmitter is written. BAV is cleared by hardware
when the Copy Base Address Frame has been
correctly sent. BAV can be cleared by software via bit
SCR.CBAV.
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