TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-120 V2.0, 2007-07
MLI, V2.0
The Receiver Interrupt Status Register RISR contains all event (interrupt) flags of the
MLI receiver. These flags can be cleared by software when writing the appropriate bits
in the RIER register; they are not cleared by hardware.
RISR
Receiver Interrupt Status Register (A8
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
1514131211109876543210
0DRAIMPEIPEIIC
CFR
I3
CFR
I2
CFR
I1
CFR
I0
ME
I
NFR
I
r rhrhrhrhrhrhrhrhrhrh
Field Bits Type Description
NFRI 0rhNormal Frame Received Interrupt Flag
This flag is set when a Write or a Read Frame has been
received. The service request output that is activated is
defined by RINPR.NFRIP.
MEI 1rhMLI Move Engine Interrupt Flag
This flag is set when the move engine has finished an
operation (read or write, depending on received frame).
The service request output that is activated is defined by
RINPR.MPPEIP.
CFRIx
(x = 0-3)
2 + x rh Command Frame Received in Pipe x Interrupt Flag
This flag is set when a Command Frame has been
received in pipe x. The service request output that is
activated is defined by RINPR.CFRIP.
IC 6rhInterrupt Command Flag
This flag is set when a Command Frame has been
received in pipe 0 leading to an activation of one of the
service request outputs SR[3:0].
The service request output that is activated is defined by
the received command CMD.
To Next Page
Loading...