Infineon Technologies TC1796 - Page 1643

TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-134 V2.0, 2007-07
MLI, V2.0
P1_IOCR4
Port 1 Input/Output Control Register 4(14
H
) Reset Value: 2020 2020
H
31 28 27 24 23 20 19 16 15 12 11 8 7 4 3 0
PC7 0PC60PC50PC40
rw rrwrrwrrwr
Field Bits Type Description
PC4,
PC5,
PC6,
PC7
[7:4],
[15:12],
[23:20],
[31:28]
rw Port Input/Output Control for Port 1 Pins 4-7
1)
Port input/output control for P1.4/TCLK0
Port input/output control for P1.5/TREADY0A
Port input/output control for P1.6/TVALID0A
Port input/output control for P1.7/TDATA0
1) Coding of bit field see Table 23-12. Shaded bits and bit fields are “don’t care” for MLI I/O port control.
P1_IOCR8
Port 1 Input/Output Control Register 8(18
H
) Reset Value: 2020 2020
H
31 28 27 24 23 20 19 16 15 12 11 8 7 4 3 0
PC11 0PC100PC90PC80
rw rrwrrwrrwr
Field Bits Type Description
PC8,
PC9,
PC10,
PC11
[7:4],
[15:12],
[23:20],
[31:28]
rw Port Input/Output Control for Port 1 Pins 8-11
1)
Port input/output control for P1.8/RCLK0A
Port input/output control for P1.9/RREADY0A
Port input/output control for P1.10/RVALID0A
Port input/output control for P1.11/RDATA0A
1) Coding of bit field see Table 23-12. Shaded bits and bit fields are “don’t care” for MLI I/O port control.