Infineon Technologies TC1796 - Page 1644

TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-135 V2.0, 2007-07
MLI, V2.0
P1_IOCR12
Port 1 Input/Output Control Register 12(1C
H
) Reset Value: 2020 2020
H
31 28 27 24 23 20 19 16 15 12 11 8 7 4 3 0
PC15 0PC140PC130 PC12 0
rw rrwrrwr rw r
Field Bits Type Description
PC13,
PC14,
PC15
[15:12],
[23:20],
[31:28]
rw Port Input/Output Control for Port 1 Pins 12-15
1)
Port input/output control for P1.13/RCLK0B
Port input/output control for P1.14/RVALID0B
Port input/output control for P1.15/RDATA0B
1) Coding of bit field see Table 23-12. Shaded bits and bit fields are “don’t care” for MLI I/O port control.
P5_IOCR4
Port 5 Input/Output Control Register 4(14
H
) Reset Value: 2020 2020
H
31 28 27 24 23 20 19 16 15 12 11 8 7 4 3 0
PC7 0PC60 PC5 0PC40
rw rrwr rw rrwr
Field Bits Type Description
PC4,
PC6
[7:4],
[23:20]
rw Port Input/Output Control for Port 5 Pins 4-7
1)
Port input/output control for P5.4/RREADY0B
Port input/output control for P5.6/TVALID0B
1) Coding of bit field see Table 23-12. Shaded bits and bit fields are “don’t care” for MLI I/O port control.