Infineon Technologies TC1796 - Page 1645

TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-136 V2.0, 2007-07
MLI, V2.0
P8_IOCR0
Port 8 Input/Output Control Register 0(10
H
) Reset Value: 2020 2020
H
31 28 27 24 23 20 19 16 15 12 11 8 7 4 3 0
PC3 0PC20PC10PC00
rw rrwrrwrrwr
Field Bits Type Description
PC0,
PC1,
PC2,
PC3
[7:4],
[15:12],
[23:20],
[31:28]
rw Port Input/Output Control for Port 8 Pins 0-4
1)
Port input/output control for P8.0/TCLK1
Port input/output control for P8.1/TREADY1A
Port input/output control for P8.2/TVALID1A
Port input/output control for P8.3/TDATA1
1) Coding of bit field see Table 23-12. Shaded bits and bit fields are “don’t care” for MLI I/O port control.
P8_IOCR4
Port 8 Input/Output Control Register 4(14
H
) Reset Value: 2020 2020
H
31 28 27 24 23 20 19 16 15 12 11 8 7 4 3 0
PC7 0PC60PC50PC40
rw rrwrrwrrwr
Field Bits Type Description
PC4,
PC5,
PC6,
PC7
[7:4],
[15:12],
[23:20],
[31:28]
rw Port Input/Output Control for Port 8 Pins 4-7
1)
Port input/output control for P8.4/RCLK1A
Port input/output control for P8.5/RREADY1A
Port input/output control for P8.6/RVALID1A
Port input/output control for P8.7/RDATA1A
1) Coding of bit field see Table 23-12. Shaded bits and bit fields are “don’t care” for MLI I/O port control.