Infineon Technologies TC1796 - Page 1654

TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-145 V2.0, 2007-07
MLI, V2.0
101
B
4 sub-ranges of
16 Kbytes
XXX00
B
XXX01
B
XXX10
B
XXX11
B
E800 0000
H
to E800 3FFF
H
E800 4000
H
to E800 7FFF
H
E800 8000
H
to E800 BFFF
H
E800 C000
H
to E800 FFFF
H
110
B
2 sub-ranges of
32 Kbytes
XXXX0
B
XXXX1
B
E800 0000
H
to E800 7FFF
H
E800 8000
H
to E800 FFFF
H
111
B
64 Kbytes XXXXX
B
E800 0000
H
to E800 FFFF
H
Table 23-17 SRAM Address Protection Sub-Range Definitions (cont’d)
SIZE1 Sub-Ranges SLICE1 Selected Address Range