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Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-26 V2.0, 2007-07
GPTA, V2.0
register DCMCOV that is continuously compared with the timer value. When the timer
is incremented up to the limit stored in capture/compare register, the service request
flag SRS0.DCM0xC is set. If the compare service request is enabled (control register
bit DCMCTRk.CRE = 1), an interrupt request is generated.
Software Generated Output Pulse
If the software intends to compensate an input pulse backlog, bit DCMCTRk.QCK
should be set to 1. This immediately triggers a single clock pulse generation on the
DCM output signal line.
DCM Interrupt Control
Each DCM unit is able to generate three service request output signals. The service
request outputs of a DCMk unit are controlled as shown in Figure 24-17. When a service
request condition occurs, the corresponding service request flag is always set. The
service request output is activated only if it is enabled by the corresponding enable bit.
Further details on service request and interrupt handling are provided in section
“Interrupt Sharing Unit (IS)” on Page 24-112.

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Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish