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Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-34 V2.0, 2007-07
GPTA, V2.0
Compensation by Software
After disabling the Automatic End Mode, the PLL generates fewer output pulses
than calculated during one input signal period. Several algorithm can be
implemented to compensate for the lack of generated output pulses:
The length of the current input signal period has been overestimated by a certain
number of f
GPTA
clock periods. This deficit should be subtracted from the calculated
length of the next input signal period.
The PLL can continue to operate with the old input signal period length estimation,
but the number of output pulses to be generated during the next input clock period
may be increased by the lack of output pulses initiated during the last signal period.
Figure 24-23 Compensation of Input Signal Acceleration
Additionally to the normal output signal, the PLL provides an uncompensated output
signal. This signal has no gaps or acceleration bursts. However, the number of
microticks during one signal period may be incorrect.
MCT05932_mod
Signal Output
AEN = 0
0123456789ABCDEF012345
0123456789ABCDEF 0 1
Microtick Counter
AEN = 0
Time
Time
Signal_Output
AEN, PEN = 1
Microtick Counter
AEN, PEN = 1
Accelerated
Input Signal
Steady State
Input Signal

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Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish