TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-61 V2.0, 2007-07
GPTA, V2.0
Cell Deactivation
Normally, the GTCs are always enabled. However, by programming a GTC to Capture
Mode with no edge selected (GTCCTRk.FED = GTCCTRk.RED = 0), the cell becomes
inactive and performs no action, but still passes action commands via the
communication link from M1I/M0I to M1O/M0O.
Cell Enabling on Event
A GTC is enabled by writing (ST byte, word, half-word operation) GTCCTRk.EOA
(Enable-Of-Action) with 0. Because bit EOA is hardware protected, read-modify-write
operations (LDMST, ST.X, SWAP) only enable the GTC if bit EOA is modified from 1
to 0. Alternatively, a GTC can be enabled by an event in a GTC with lower index number.
For this purpose, the local event function of a GTC must be disabled by initially setting
GTCCTRk.EOA. This will clear GTCCTRk.CEN and now a local event cannot affect the
GTC. When a preceding GTC generates and communicates an event (or OIA) via its
communication link M1O/M0O, at least one of the M1I/ M0I input lines changes its state
to 1. This condition clears bit GTCCTRk.EOA of the disabled GTC via the OR gate as
shown in Figure 24-45. Now GTCCTRk.CEN is set and the cell is enabled for local
events.
It is also possible to enable the following GTC via the communication link for local events.
For this purpose, the GTCCTRk.EOA bit of the following GTC must be set, too. If bit
GTCCTRk.OCM2 of the preceding GTC is 1, the enable action will take place at the
same time as in the preceding GTC. Otherwise the GTC will be enabled later on a
capture/compare event in the preceding GTC, provided OCM0 or OCM1 of this GTC is
different from 0.
In this way, several GTCs can be enabled at the same time or one after the other.
Normally, the cells will be used in One Shot Mode, and an interrupt will be generated
after the last event to evaluate the data and to prepare the next enable sequence.
A disabled GTC (GTCCTRk.CEN = 0) behaves as an inactive cell.
Logical Operating Units
The inter-cell communication architecture allows implementation of a complex waveform
generation to be distributed over several GTCs, controlling a common port pin.
For example, one GTC may be configured in Capture Mode triggered by a rising edge
detected on the associated input pin line. The related interrupt service routine can
increment the captured timer value by a delay offset and store the result in the GTCXR
register of the adjacent GTC configured in Compare Mode. Upon a compare event in the
second GTC, the output port line of a third GTC can be set via M1O, M0O interface lines.
When the GTCXR register of the third cell is loaded with another compare value by the
interrupt service routine related to the second GTC, the output port line may be reset by
the next compare event within GTC3.
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