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TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-60 V2.0, 2007-07
GPTA, V2.0
When bit GTCCTRk.OCM2 is cleared, the data output GTCkOUT is only controlled by
the local GTCk. A set, reset, toggle, or hold operation can be performed as selected by
bits GTCCTRk.OCM1 and GTCCTRk.OCM0 (Table 24-2).
When bit GTCCTRk.OCM2 is set, the data output GTCkOUT is affected either by the
local GTCCTRk.OCM1 and GTCCTRk.OCM0 bits or by the M1I/M0I input lines, which
are connected to the adjacent GTCk-1 Global Timer output lines M1O/M0O. An enabled
GTCk event superimposes an action request generated simultaneously by the M1I/M0I
inputs.
When the bypass bit GTCCTRk.BYP is cleared, the M1O/M0O output lines logically OR
together the local GTCk events and, if enabled by bit GTCCTRk.OCM2, the action
requests received via the M1I/M0I input lines.
When bit GTCCTRk.BYP is set to 1, a local GTCk event will not modify the M1O/M0O
output lines.
The GTCkOUT output line can be connected to output ports, on-chip peripheral inputs,
and/or LTC inputs via the I/O Line Sharing Unit (see Page 24-90). GTCkOUT can be
updated directly by software (setting bit GTCCTRk.OIA = 1) or upon a timer, capture or
compare event within the local GTCk or a preceding GTC. The current state of the data
output line can be evaluated by reading status flag GTCCTRk.OUT.
Table 24-2 Selection of GTC Output Operations and Action Transfer Modes
Bit Field
OCM[2:0]
Local Capture or
Compare Event
M1O/M0O
BYP = 0
M1O/M0O
BYP = 1
State of Local
Data Output Line
0 0 0 not occurred
occurred
0
0
0
0
0
0
0
0
not modified
not modified
0 0 1 not occurred
occurred
0
0
0
1
0
0
0
0
not modified
inverted
0 1 0 not occurred
occurred
0
1
0
0
0
0
0
0
not modified
0
0 1 1 not occurred
occurred
0
1
0
1
0
0
0
0
not modified
1
1 0 0 not occurred
occurred
M1I
M1I
M0I
M0I
M1I
M1I
M0I
M0I
modified according M1I/M0I
modified according M1I/M0I
1 0 1 not occurred
occurred
M1I
0
M0I
1
M1I
M1I
M0I
M0I
modified according M1I/M0I
inverted
1 1 0 not occurred
occurred
M1I
1
M0I
0
M1I
M1I
M0I
M0I
modified according M1I/M0I
0
1 1 1 not occurred
occurred
M1I
1
M0I
1
M1I
M1I
M0I
M0I
modified according M1I/M0I
1

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