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Infineon Technologies TC1796 - Page 1728

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TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-73 V2.0, 2007-07
GPTA, V2.0
Data Input Line Control
The data input line LTCkIN can operate in two modes (selected by bit LTCCTRk.ILM):
Level Sensitive or
Edge Sensitive.
In Edge Sensitive Mode, the active edges are selected by bits LTCCTRk.FED and
LTCCTRk.RED. For the Level Sensitive Mode, the active level of the input signal can be
selected by bit FED/AIL of register LTCCTRk.
Depending on which source is selected for the input line by the input multiplexer,
different clocking modes of the LTC cell are possible (Table 24-3).
Table 24-3 LTC Data Input Line Operation (in Timer Mode)
Input Source Level Sensitive Input Line
LTCCTRk.ILM = 1
Edge Sensitive Input Line
LTCCTRk.ILM = 0
External Signal
(Port line)
The external signal operates
as gating signal for the cell.
The active input level can be
selected with control register
bit AIL. Additionally, the LTC
prescaler mode can be
enabled with LTCCTRk.PEN
to reduce the timer frequency.
The programmed function of
the LTC is performed with the
GPTA module clock
frequency, or with the
programmed prescaler clock
LTCPRE (see Page 24-36).
The programmed function of the LTC
cell is performed on selected
edge(s).
Internal Clock
Bus Line or
PDL output or
INT input
The programmed function is
performed with the internal
clock or PDL/INT signal. Note
that all internal clock bus lines
and PDL signals are active
high pulses. The LTC
Prescaler Mode and the input
signal inversion must not be
used.
The programmed function of the LTC
cell is performed on selected
edge(s).
In case of full speed GPTA module
clock selection as input clock, the
Level Sensitive Mode must be
selected. The Edge Sensitive Mode
will not produce an event in this
special case.

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