TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-104 V2.0, 2007-07
GPTA, V2.0
Control Registers are not directly accessible but must be written or read using a FIFO
array structure as described on Page 24-110.
Table 24-11 GTC Input Multiplexer Control Register Assignments
GTC Group and GTCs Controlled by
Multiplexer Control
Register
Selectable Groups via
GIMGng
GTCG0 GTC[03:00] GIMCRL0 IOG0, IOG4, LTCG0,
LTCG4, FPC/INT
GTC[07:04] GIMCRH0
GTCG1 GTC[11:08] GIMCRL1 IOG1, IOG5, LTCG1,
LTCG5, FPC/INT
GTC[15:12] GIMCRH1
GTCG2 GTC[19:16] GIMCRL2 IOG2, IOG6, LTCG2,
LTCG6, FPC/INT
GTC[23:20] GIMCRH2
GTCG3 GTC[27:24] GIMCRL3 IOG3, LTCG3, LTCG7,
FPC/INT
GTC[31:28] GIMCRH3
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