TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-178 V2.0, 2007-07
GPTA, V2.0
CAC 5rwCapture after Compare Select
0
B
Capture after compare is disabled.
1
B
After a compare event, the contents of the
associated Global Timer as selected by MOD or
(depending on control bit CAT) the contents of the
alternate Global Timer are copied to the
capture/compare register GTCXRk.
CAT 6rwCapture Alternate Timer
0
B
The Global Timer as selected by MOD is captured,
if enabled by control bit CAC = 1.
1
B
The alternate Global Timer is captured.
BYP 7rwBypass
0
B
M0O/M1O lines are affected either by M0I/M1I lines
or by OCM0/OCM1 bits.
1
B
M0O/M1O lines are affected only by M0I/M1I lines.
Note: OCM2 must be set in any case to enable reaction
on M0I/M1I changes.
EOA 8rwhEnable On Action
0
B
GTCk is enabled for local events.
1
B
GTCk is disabled for local events. On an event on
the communication link via M0I/M1I lines, EOA will
be cleared and local events will be enabled.
This bit is protected during read-modify-write operations
(hardware will win).
CEN 10 rh Cell Enable
0
B
GTCk is currently disabled for local events.
1
B
GTCk is currently enabled for local events.
OCM [13:11] rw Output Control Mode Select
X00
B
Current state of GTCkOUT output line is hold.
X01
B
Current state of GTCkOUT output line is toggled.
X10
B
GTCkOUT output line is forced to 0.
X11
B
GTCkOUT output line is forced to 1.
0XX
B
GTCkOUT output line state is set by an internal
GTCk event only.
1XX
B
GTCkOUT output line state is affected by an internal
GTCk event and/or by an operation occurred in an
adjacent GTCn (n = less or equal k) and reported by
the M1I, M0I interface lines.
Field Bits Type Description
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