TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-259 V2.0, 2007-07
GPTA, V2.0
GPTA-to-MSC Multiplexer Control Registers
Four registers are required for GPTA-to-MSC multiplexer control:
• GPTA0_MMXCTR00 controls the interconnections of GPTA0, GPTA1 and LTCA2 to
the MSC0 ALTINL[15:0] inputs.
• GPTA0_MMXCTR01 controls the interconnections of GPTA0, GPTA1 and LTCA2 to
the MSC0 ALTINH[15:0] inputs.
• GPTA0_MMXCTR10 controls the interconnections of GPTA0, GPTA1 and LTCA2 to
the MSC1 ALTINL[15:0] inputs.
• GPTA0_MMXCTR11 controls the interconnections of GPTA0, GPTA1 and LTCA2 to
the MSC1 ALTINH[7:0] inputs.
For each of the ALTINL/ALTINH inputs of MSC0 and MSC1, the 2-bit bit fields in these
registers determine which module (GPTA0, GPTA1 or LTCA2) output is selected.
ALTINH.7 OUT79 / OG2.7 ALTINH.7 OUT111 / OG6.7
ALTINH.8 OUT80 / OG3.0 – –
ALTINH.9 OUT81 / OG3.1 – –
ALTINH.10 OUT82 / OG3.2 – –
ALTINH.11 OUT83 / OG3.3 – –
ALTINH.12 OUT84 / OG3.4 – –
ALTINH.13 OUT85 / OG3.5 – –
ALTINH.14 OUT86 / OG3.6 – –
ALTINH.15 OUT87 / OG3.7 – –
Table 24-29 GPTA0/GPTA1/LTCA2 to MSC Interconnection Assignment (cont’d)
MSC0
Input Line
Assigned
GPTA0/GPTA1/LTCA2
Output Line
MSC1
Input Line
Assigned
GPTA0/GPTA1/LTCA2
Output Line
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