Infineon Technologies TC1796 - Page 2015

TC1796
Peripheral Units (Vol. 2 of 2)
Analog-to-Digital Converter (ADC)
User’s Manual 25-84 V2.0, 2007-07
ADC, V2.0
SYSTAT
Synchronization Status Register (190
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SY
REQ
0
rh r
1514131211109876543210
CSR
EN
0
GRP
S
EMUX RES 0 CHNRSY
rh r rh rh rh r rh
Field Bits Type Description
CHNRSY [3:0] rh Channel to be Converted in Synchronized
Conversion
This bit field indicates the channel number of the
analog channel which is converted in synchronized
mode.
RES [7:6] rh Conversion Resolution Status
This bit field indicates the resolution of the A/D
Converter for the conversion of the analog channel
determined by CHNRSY.
00
B
10-bit resolution
1
B
012-bit resolution
10
B
8-bit resolution
11
B
Reserved
EMUX [9:8] rh External Multiplexer Status
This bit indicates the settings of the external
multiplexer control lines that is used during an A/D
conversion for the analog channel determined by
CHNRSY.
GRPS 10 rh Status of Analog Input Multiplexer Group Select
This bit indicates the status of the analog input
multiplexer group select of the analog channel
determined by CHNRSY.
0
B
Analog input multiplexer group 0 selected
1
B
Analog input multiplexer group 1 selected