TC1796
System Units (Vol. 1 of 2)
System Control Unit
User’s Manual 5-24 V2.0, 2007-07
SCU, V2.0
The Flag Modification Register is a write-only register that is used to set and to clear the
bits INTFx in register EIFR. If a set event and a clear event (hardware or software) for bit
INTFx occur at the same time, the set event is taken into account.
Note: This register is virtual and does not contain any flip-flop.
FMR
Flag Modification Register (F000008C
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
FC
3
FC
2
FC
1
FC
0
r wwww
1514131211109876543210
0
FS
3
FS
2
FS
1
FS
0
r wwww
Field Bits Type Description
FSx
(x = 0-3)
xwSet Flag INTFx for Channel x
Setting this bit will set the corresponding bit INTFx in
register EIFR. Reading this bit always delivers a 0.
0
B
The bit x in register EIFR is not modified.
1
B
The bit x in register EIFR is set.
FCx
(x = 0-3)
16 + x w Reset Flag INTFx for Channel x
Setting this bit will clear the corresponding bit INTFx
in register EIFR. Reading this bit always delivers a 0.
0
B
The bit x in register EIFR is not modified.
1
B
The bit x in register EIFR is reset.
0 [15:4],
[31:20]
r Reserved
Read as 0; should be written with 0.
To Next Page
Loading...
Need help?
General