TC1796
System Units (Vol. 1 of 2)
System Control Unit
User’s Manual 5-55 V2.0, 2007-07
SCU, V2.0
Note: In pad test mode, the bits in SCU_PTDAT1 are output to the pad/pin in inverted
state: a 0 generates a high level and a 1 generates a low level at the pad/pin.
SCU_PTDAT2
SCU Pad Test Data Register 2 (F00000BC
H
) Reset Value: XXXX 0XXX
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SLS
I0
SCL
K0
MR
ST0
MT
SR0
SLS
O1
SLS
O0
0
rwh rwh rwh rwh rwh rwh rw
1514131211109876543210
0
TST
RES
TES
TMO
DE
TMS TDO TDI TCK
T
RST
BF
CLK
O
BF
CLK
I
BYP
ASS
r rh rh rwhrwhrwhrwhrwhrwhrwhrwh
Field Bits Type Description
BYPASS 0rwhPad Test Value for/of BYPASS
BFCLKI 1rwhPad Test Value for/of BFCLKI
BFCLKO 2rwhPad Test Value for/of BFCLKO
TRST 3rwhPad Test Value for/of TRST
TCK 4rwhPad Test Value for/of TCK
TDI 5rwhPad Test Value for/of TDI
TDO 6rwhPad Test Value for/of TDO
TMS 7rwhPad Test Value for/of TMS
TESTMODE 8rhPad Test Value of TESTMODE
TSTRES 9rhPad Test Value of TSTRES
0 [15:10] r Reserved
Reading this bit always returns 0.
0 [25:16] rw Reserved
Read as 0 after reset; returns the value that is written.
SLSO0 26 rwh Pad Test Value for/of SLSO0
SLSO1 27 rwh Pad Test Value for/of SLSO1
MTSR0 28 rwh Pad Test Value for/of MTSR0
MRST0 29 rwh Pad Test Value for/of MRST0
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