TC1796
System Units (Vol. 1 of 2)
System Control Unit
User’s Manual 5-56 V2.0, 2007-07
SCU, V2.0
Note: In pad test mode, the bits in SCU_PTDAT2 are output to the pad/pin in inverted
state: a 0 generates a high level and a 1 generates a low level at the pad/pin.
Note: In pad test mode, the bits in SCU_PDAT3 are output to the pad/pin in inverted
state: a 0 generates a high level and a 1 generates a low level at the pad/pin.
SCLK0 30 rwh Pad Test Value for/of SCLK0
SLSI0 31 rwh Pad Test Value for/of SLSI0
SCU_PTDAT3
SCU Pad Test Data Register 3 (F00000C0
H
) Reset Value: XXXX XXXX
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20 D19 D18 D17 D16
rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh
1514131211109876543210
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh rwh
Field Bits Type Description
Dn
(n = 0-31)
nrwhPad Test Value for/of EBU Data Bus Line Dn
Field Bits Type Description
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