TC1796
System Units (Vol. 1 of 2)
Program Memory Unit
User’s Manual 7-56 V2.0, 2007-07
PMU, V2.0
DCF 17 rwh Disable Code Fetch from Flash Memory
This bit enables/disables the code fetches from the
internal PFLASH memory when read protection is
active. Once set, this bit can only be cleared when
read protection is inactive (RPA = 0).
DCF is automatically set after a reset operation. It is
cleared by hardware in case of internal program start
out of the PFLASH.
0
B
Code fetches from PFLASH are allowed.
1
B
Code fetches from PFLASH are not allowed.
DCF is not evaluated when read protection is inactive
(RPA = 0).
DDF 18 rwh Disable Data Fetch from Flash Memory
This bit enables/disables the data read access from
the PFLASH and DFLASH memory when read
protection is active. Once set, this bit can only be
cleared when read protection is inactive (RPA = 0).
DDF is automatically set after a reset operation. It is
cleared by hardware in case of internal program start
out of the PFLASH.
0
B
Data read access to PFLASH and DFLASH is
allowed.
1
B
Data read access to PFLASH and DFLASH is
not allowed.
DDF is not evaluated when read protection is inactive
(RPA = 0).
DDFDBG 19 rw Disable Data Fetch from Debug System
This bit enables/disables PFLASH and DFLASH data
read accesses that are initiated by the on-chip debug
system (Cerberus). Once set, this bit can only be
cleared when RPA = 0.
0
B
Data read accesses from PFLASH/DFLASH
initiated by the debug system are enabled.
1
B
Data read accesses from PFLASH/DFLASH
initiated by the debug system are disabled.
Field Bits Type Description
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