TC1796
System Units (Vol. 1 of 2)
Direct Memory Access Controller
User’s Manual 12-65 V2.0, 2007-07
DMA, V2.0
IPM0x
(x = 0-7)
16+x rh Pattern Detection from Channel 0x
This bit indicates that a pattern has been detected for
channel 0x while the pattern detection has been
enabled. This bit (and ICH0x) is cleared by software
when writing a 1 to INTCR.CICH0x or by a channel
reset (writing CHRSTR.CH0x = 1).
0
B
A pattern has not been detected.
1
B
A pattern has been detected.
IPM1x
(x = 0-7)
24+x rh Pattern Detection from Channel 1x
This bit indicates that a pattern has been detected for
channel 1x while the pattern detection has been
enabled. This bit (and ICH1x) is cleared by software
when writing a 1 to INTCR.CICH1x or by a channel
reset (writing CHRSTR.CH1x = 1).
0
B
A pattern has not been detected.
1
B
A pattern has been detected.
Field Bits Type Description
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