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Infineon Technologies TC1796 - Page 734

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
Direct Memory Access Controller
User’s Manual 12-70 V2.0, 2007-07
DMA, V2.0
RBT0 [7:5] rh Read Buffer Trace for FPI Bus Interface 0
This bit field contains trace information from the
buffer in the FPI Bus Interface 0. In the TC1796 it
indicates the source of a bus access to the Remote
Peripheral Bus.
000
B
Reset value or bridge from FPI0 to FPI1.
001
B
DMA Move Engine 0
010
B
DMA Move Engine 1
011
B
MLI0
100
B
MLI1
Other bit combinations are reserved.
RBT0 is useful for emulation purposes. It i s not
recommended to evaluate this bit field during normal
operation of the TC1796.
ME1RS 8rhMove Engine 1 Read Status
0
B
Move Engine 1 is not performing a read.
1
B
Move Engine 1 is performing a read.
CH1 [11:9] rh Reading Channel in Move Engine 1
These bit field indicates which channel number is
currently being processed by the Move Engine 1.
ME1WS 12 rh Move Engine 1 Write Status
0
B
Move Engine 1 is not performing a write.
1
B
Move Engine 1 is performing a write.
RBT1 [15:13] rh Read Buffer Trace for FPI Bus Interface 1
This bit field contains trace information from the
buffer in the FPI Bus Interface 1. In the TC1796, it
indicates the source of a bus access to the System
Peripheral Bus.
000
B
Reset value or bridge from FPI0 to FPI1.
001
B
DMA Move Engine 0
010
B
DMA Move Engine 1
011
B
MLI0
100
B
MLI1
Other bit combinations are reserved.
RBT1 is useful for emulation purposes. It i s not
recommended to evaluate this bit field during normal
operation of the TC1796.
0 [31:16] r Reserved
Read as 0; should be written with 0.
Field Bits Type Description

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