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Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
Direct Memory Access Controller
User’s Manual 12-71 V2.0, 2007-07
DMA, V2.0
The Move Engine m (m = 0,1) Read Register indicates the value that has just been read
by Move Engine m. The value in this register is compared to the bits in register MEmPR
according to the bit fields CHCR0x.PATSEL.
DMA_ME0R
DMA Move Engine 0 Read Register
(034
H
) Reset Value: 0000 0000
H
DMA_ME1R
DMA Move Engine 1 Read Register
(038
H
) Reset Value: 0000 0000
H
31 24 23 16 15 8 7 0
RDm3 RDm2 RDm1 RDm0
rh rh rh rh
Field Bits Type Description
RDm0,
RDm1,
RDm2,
RDm3
[7:0],
[15:8],
[23:16],
[31:24]
rh Read Value for Move Engine m
Contains the 32-bit read data (four bytes RDm[3:0])
that is stored in the Move Engine m after each read
move. The content of MEmR is overwritten after each
read move of a DMA channel belonging to DMA Sub-
block m.

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