TC1796
System Units (Vol. 1 of 2)
Direct Memory Access Controller
User’s Manual 12-72 V2.0, 2007-07
DMA, V2.0
The Move Engine m (m = 0,1) Pattern Register contains the patterns (mask and/or
compare bits) to be processed by the pattern detection logic in Move Engine m.
DMA_ME0PR
DMA Move Engine 0 Pattern Register
(03C
H
) Reset Value: 0000 0000
H
DMA_ME1PR
DMA Move Engine 1 Pattern Register
(040
H
) Reset Value: 0000 0000
H
31 24 23 16 15 8 7 0
PATm3 PATm2 PATm1 PATm0
rw rw rw rw
Field Bits Type Description
PATm0,
PATm1,
PATm2,
PATm3
[7:0],
[15:8],
[23:16],
[31:24]
rw Pattern for Move Engine m
Determines up to four 8-bit compare patterns/mask
patterns to be processed by the pattern detection
logic in Move Engine m. Depending on the pattern
detection configuration (CHCRmx.PATSEL) and
channel data width (CHCRmx.CHDW), the patterns
are processed as bytes or half-words.
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