Infineon Technologies TC1796 - Page 737

TC1796
System Units (Vol. 1 of 2)
Direct Memory Access Controller
User’s Manual 12-73 V2.0, 2007-07
DMA, V2.0
The DMA Move Engine m (m = 0,1) Access Enable Register controls the access
protection. It enables/disables the address protection ranges n (n = 0-31) for Move
Engine m.
Note: See Table 12-11 on Page 12-98 for the TC1796 specific address range definition.
DMA_ME0AENR
DMA Move Engine 0 Access Enable Register
(044
H
) Reset Value: 0000 0000
H
DMA_ME1AENR
DMA Move Engine 1 Access Enable Register
(04C
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
AEN
31
AEN
30
AEN
29
AEN
28
AEN
27
AEN
26
AEN
25
AEN
24
AEN
23
AEN
22
AEN
21
AEN
20
AEN
19
AEN
18
AEN
17
AEN
16
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
AEN
15
AEN
14
AEN
13
AEN
12
AEN
11
AEN
10
AEN
9
AEN
8
AEN
7
AEN
6
AEN
5
AEN
4
AEN
3
AEN
2
AEN
1
AEN
0
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Field Bits Type Description
AENn
(n = 0-31)
nrwAddress Range x Enable
This bit enables the read and write capability of the
DMA Move Engines for address range n (n = 0-31).
0
B
DMA read and write moves to address range n
are disabled.
1
B
DMA read and write moves to address range n
are enabled.
If AENn = 0 for a read/write move to address range n,
the read/write move is not executed and a
source/destination Move Engine interrupt is
generated