Infineon Technologies TC1796 - Page 760

TC1796
System Units (Vol. 1 of 2)
Direct Memory Access Controller
User’s Manual 12-96 V2.0, 2007-07
DMA, V2.0
13 CH12_OUT DMA channel 12 CHCR13.PRSEL = 000
B
SCU_REQ3 Ext. Request Unit
1)
CHCR13.PRSEL = 001
B
SR3 FADC CHCR13.PRSEL = 010
B
SR5 ADC0 CHCR13.PRSEL = 011
B
SR5 ADC1 CHCR13.PRSEL = 100
B
SR7 MLI0 CHCR13.PRSEL = 101
B
SR7 MLI1 CHCR13.PRSEL = 110
B
not connected (0) CHCR13.PRSEL = 111
B
14 CH13_OUT DMA channel 13 CHCR14.PRSEL = 000
B
SCU_REQ0 Ext. Request Unit
1)
CHCR14.PRSEL = 001
B
SR0 FADC CHCR14.PRSEL = 010
B
SR6 ADC0 CHCR14.PRSEL = 011
B
SR6 ADC1 CHCR14.PRSEL = 100
B
SR3 MSC0 CHCR14.PRSEL = 101
B
SR3 MSC1 CHCR14.PRSEL = 110
B
not connected (0) CHCR14.PRSEL = 111
B
15 CH14_OUT DMA channel 14 CHCR15.PRSEL = 000
B
SCU_REQ1 Ext. Request Unit
1)
CHCR15.PRSEL = 001
B
SR1 FADC CHCR15.PRSEL = 010
B
SR7 ADC0 CHCR15.PRSEL = 011
B
SR7 ADC1 CHCR15.PRSEL = 100
B
INT_O3 MultiCAN CHCR15.PRSEL = 101
B
RIR SSC1 CHCR15.PRSEL = 110
B
not connected (0) CHCR15.PRSEL = 111
B
Table 12-10 DMA Request Assignment for DMA Sub-Block 1 (cont’d)
DMA
Channel
DMA Request Source DMA Request Unit Selected by