Infineon Technologies TC1796 User Manual

TC1796
System Units (Vol. 1 of 2)
Direct Memory Access Controller
User’s Manual 12-100 V2.0, 2007-07
DMA, V2.0
In the TC1796, two internal memory areas are assigned for access protection using
programmable address sub-ranges:
• 8-Kbyte Dual-Ported RAM (DPRAM), assigned as address range 18. The sub-ranges
are controlled by bit fields MEmARR.SIZE0 and MEmARR.SLICE0.
• 64-Kbyte SRAM, assigned as address range 29. The sub-ranges are controlled by
bit fields MEmARR.SIZE1 and MEmARR.SLICE1.
Bit fields SIZE0 and SLICE0 for the DPRAM sub-range access protection are coded as
shown in Table 12-12.
Table 12-12 DPRAM Address Protection Sub-Range Definitions
SIZE0 Sub-Ranges SLICE0 Selected Address Range
000
B
32 sub-ranges of
64 byte
00000
B
00001
B
…
11111
B
F010 A000
H
- F010 A03F
H
F010 A040
H
- F010 A07F
H
…
F010 A7C0
H
- F010 A7FF
H
F010 A800
H
- F010 BFFF
H
is not selectable
001
B
32 sub-ranges of
128 byte
00000
B
00001
B
…
11111
B
F010 A000
H
- F010 A07F
H
F010 A080
H
- F010 A0FF
H
…
F010 AF80
H
- F010 AFFF
H
F010 B000
H
- F010 BFFF
H
is not selectable
010
B
32 sub-ranges of
256 byte
00000
B
00001
B
…
11111
B
F010 A000
H
- F010 A0FF
H
F010 A100
H
- F010 A1FF
H
…
F010 BF00
H
- F010 BFFF
H
011
B
16 sub-ranges of
512 byte
X0000
B
X0001
B
…
X1111
B
F010 A000
H
- F010 A1FF
H
F010 A200
H
- F010 A3FF
H
…
F010 BE00
H
- F010 BFFF
H
100
B
8 sub-ranges of
1 Kbyte
XX000
B
XX001
B
…
XX111
B
F010 A000
H
- F010 A3FF
H
F010 A400
H
- F010 A7FF
H
…
F010 BC00
H
- F010 BFFF
H
101
B
4 sub-ranges of
2 Kbyte
XXX00
B
XXX01
B
XXX10
B
XXX11
B
F010 A000
H
- F010 A7FF
H
F010 A800
H
- F010 AFFF
H
F010 B000
H
- F010 B7FF
H
F010 B800
H
- F010 BFFF
H

Infineon Technologies TC1796 Specifications

General

Brand	Infineon Technologies
Model	TC1796
Category	Controller
Language	English