TC1796
System Units (Vol. 1 of 2)
Introduction
User’s Manual 1-49 V2.0, 2007-07
Intro, V2.0
P10
P10.0
P10.1
P10.2
P10.3
A21
B21
C21
D21
I
I
I
I
I
– V
DDP
Hardware Configuration Inputs / Port 10
These inputs are boot mode (hardware
configuration) control inputs. They are
latched with the rising edge of HDRST.
Port 10 input line 0 / HWCFG0
Port 10 input line 1 / HWCFG1
Port 10 input line 2 / HWCFG2
Port 10 input line 3 / HWCFG3
After reset (HDRST = 1), the state of the
Port 10 input pins may be modified from the
reset configuration state. Their actual state
can be read via software (P10_IN register).
During normal operation, input HWCFG1
serves as emergency shut-off control input
for certain I/O lines (e.g. GPTA-related
outputs).
Dedicated Peripheral I/Os
SLSO0 AE14 O A2 V
DDP
SSC0 Slave Select Output Line 0
SLSO1 AC15 O SSC0 Slave Select Output Line 1
MTSR0 AF15 O
I
SSC0 Master Transmit Output /
SSC0 Slave Receive Input
MRST0 AE15 I
O
SSC0 Master Receive Input /
SSC0 Slave Transmit Output
SCLK0 AF14 I/O SSC0 Clock Input/Output
SLSI0 AD15 I SSC0 Slave Select Input
Table 1-3 Pin Definitions and Functions (cont’d)
Symbol Pins I/O Pad
Driver
Class
Power
Supply
Functions
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