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Instruction Set
1085
SPNU563A–March 2018
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Copyright © 2018, Texas Instruments Incorporated
High-End Timer (N2HET) Module
irq ON generates an interrupt when the event occurs that triggers the
jump. If irq is set to OFF, no interrupt is generated.
Default: OFF.
Table 23-83. Branch Condition Encoding for BR
Event C7 C6 C5 C4 C3 Branch Condition
NOCOND 0 0 0 0 0 Always
FALL 0 0 1 0 0 On falling edge on the selected pin
RISE 0 1 0 0 0 On rising edge on selected pin
BOTH 0 1 1 0 0 On rising or falling edge on selected pin
ZERO 1 0 0 0 0 If Zero flag is set
NAF 1 0 1 0 0 If NAF_global flag is set
LOW 1 1 0 0 0 On LOW level on selected pin
HIGH 1 1 1 0 0 On HIGH level on selected pin
C 0 0 0 0 1 Carry Set: C==1
NC 0 0 0 1 1 Carry Not Set: C==0
EQ, Z 0 0 1 0 1 Equal or Zero: Z==1
NE, NZ 0 0 1 1 1 Not Equal or Not Zero: Z==0
N 0 1 0 0 1 Negative: N==1
PZ 0 0 1 1 1 Positive or Zero: N==0
V 0 1 1 0 1 Overflow: V==1
NV 0 1 1 1 1 No Overflow: V==0
ZN 1 0 0 0 1 Zero or Negative: (Z OR N) == 1
P 1 0 0 1 1 Positive: (Z OR N) == 0
GE 1 0 1 1 1 Signed Greater Than or Equal: (N XOR V) == 0
L 1 0 1 0 1 Signed Less Than (N XOR V) == 1
G 1 1 0 1 1 Signed Greater Than (Z OR (N XOR V)) == 0
LE 1 1 0 0 1 Signed Less Than (Z OR (N XOR V)) == 1
LO 1 1 1 1 1 Unsigned Less Than: (C OR Z) == 0
HS 1 1 1 0 1 Unsigned Higher or Same (C OR Z) == 1
Execution
If (Condition is true)
{
If (Interrupt Enable == 1) HETFLG[n] = 1; /* n depends on address */
If ([C28:C27] == 01) Generate request on request line [P25:P23];
If ([C28:C27] == 11) Generate quiet request on request line [P25:P23];
Jump to Conditional Address;
}
else
{
Jump to Next Program Address;
}
Prv bit = Current Lx value of selected pin; (Always Executed)
The specific interrupt flag that is triggered depends on the address from which the instruction is executed,
see Section 23.2.7.
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