Overview
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SPNU563A–March 2018
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High-End Timer Transfer Unit (HTU) Module
24.1 Overview
The HET transfer unit is a dedicated direct memory access controller that transfers data between the
N2HET RAM and RAM buffers located in the main memory address range. This eliminates time
consuming CPU accesses to the N2HET RAM to gather measurement data or creating output waveforms
and thus freeing up the CPU to perform other tasks.
24.1.1 Features
• Independently transfers data between the N2HET and the main memory
• 8 double control packets supporting dual buffer configuration
• Transfer requests generated by N2HET instructions/events
• One shot, circular and auto switch buffer transfer modes for each double control packet for flexible
buffer handling
• Constant and post-increment addressing modes
• 32- or 64-bit transactions
• Programmable memory protection region
• Parity protect control packet RAM
• Extensive diagnostic functionality
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