CRC Control Registers
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SPNU563A–March 2018
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Cyclic Redundancy Check (CRC) Controller Module
18.4.30 Channel 2 CRC Value High Register (CRC_REGH2)
Figure 18-38. Channel 2 CRC Value High Register (CRC_REGH2) [offset = ACh]
31 0
CRC2
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 18-34. Channel 2 CRC Value High Register (CRC_REGH2) Field Descriptions
Bit Field Description
31-0 CRC2 Channel 2 CRC Value High Register. This register contains the current known good signature value stored at
CRC2[63:32] register.
18.4.31 Channel 2 PSA Sector Signature Low Register (PSA_SECSIGREGL2)
Figure 18-39. Channel 2 PSA Sector Signature Low Register (PSA_SECSIGREGL2)
[offset = B0h]
31 0
PSASECSIG2
R-0
LEGEND: R = Read only; -n = value after reset
Table 18-35. Channel 2 PSA Sector Signature Low Register (PSA_SECSIGREGL2)
Field Descriptions
Bit Field Description
31-0 PSASECSIG2 Channel 2 PSA Sector Signature Low Register. This register contains the value stored at
PSASECSIG2[31:0] register.
18.4.32 Channel 2 PSA Sector Signature High Register (PSA_SECSIGREGH2)
Figure 18-40. Channel 2 PSA Sector Signature High Register (PSA_SECSIGREGH2)
[offset = B4h]
31 0
PSASECSIG2
R-0
LEGEND: R = Read only; -n = value after reset
Table 18-36. Channel 2 PSA Sector Signature High Register (PSA_SECSIGREGH2)
Field Descriptions
Bit Field Description
31-0 PSASECSIG2 Channel 2 PSA Sector Signature High Register. This register contains the value stored at
PSASECSIG2[63:32] register.