Overview
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SPNU563A–March 2018
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Power Management Module (PMM)
5.1 Overview
The microcontroller is part of the family of microcontrollers from Texas Instruments for safety-critical
applications. Several functions are implemented on this microcontroller targeted towards varied
applications. The core logic is divided into several domains that can be independently turned on or off
based on the application’s requirements. Turning off a domain has the effect to only turn off the clocks into
the domain. Dynamic current is virtually reduced to zero. Leakage will remain the same as in this device
no physical power switches are implemented to isolate a domain from its core supply.
This chapter describes the Power Management Module (PMM). The PMM provides memory-mapped
registers that control the states of the supported power domains. The PMM includes interfaces to the
Power Mode Controller (PMC) and the Power State Controller (PSCON). The PMC and PSCON control
the power up/down sequence of each power domain.
5.1.1 Features
The main features of the PMM implemented on the microcontroller are:
• Supports 6 logic power domains: PD1, PD2, PD3, PD4, PD5 and PD6
• Allows configurable default states for each power domain
• Allows each power domain to be permanently disabled
• Manages the clocks for each power domain
• Manages the resets to each power domain
• Includes failsafe compare logic to continuously monitor the states of each power domain
• Supports diagnostic and self-test logic to validate failsafe compare logic
5.1.2 Block Diagram
PMM consists of several key components:
• Register interface – the PMM control registers are mapped to the device memory space and start at
address 0xFFFF0000.
• System Interface – the PMM receives the clocks, resets, errors and all other control signals through
this interface.
• PSCON Diagnostic Compare – this block compares the outputs of each primary PSCON and the
respective diagnostic PSCON implemented for failsafe safety.
• Self-Test Diagnostic – this block contains the logic to place the PSCON diagnostic compare block in a
self-test mode in order to test the failsafe feature.
• Clock management – the PMM provides independent clock gating and handshaking controls for each
power domain and also generates the clock domains for each power domain.
• Reset Management – the PMM provides independent reset signals for each power domain.
• Power Mode Controller (PMC) – The PMC is a finite state machine that controls the power sequence
from one power mode to another. A power mode is the states of all power domains at a given time.
• Power State Controller (PSCON) – The PSCON is a finite state machine that controls the power
sequence of a power domain from one state to another. Each power domain is controlled by one
dedicated PSCON.
• Power Domain – In this device, a power domain is a group of logic and/or memories which shares the
common control inputs.
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