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ADC Registers
949
SPNU563A–March 2018
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Analog To Digital Converter (ADC) Module
22.3.71 ADC Group2 Channel Selection Mode Control Register (ADG2CHNSELMODECTRL)
Figure 22-102 and Table 22-77 describe the ADG2CHNSELMODECTRL register.
Figure 22-102. ADC Group2 Channel Selection Mode Control Register
(ADG1CHNSELMODECTRL) (offset = 198h)
31 4 3 0
Reserved G2_ENH_CHNSEL_MODE_ENABLE
R-0 R//W-5h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 22-77. ADC Group2 Channel Selection Mode Control Register
(ADG2CHNSELMODECTRL) Field Descriptions
Bit Field Value Description
31-4 Reserved 0 Reads return 0. Writes have no effect.
3-0 G2_ENH_CHNSEL_
MODE_ENABLE
Enable enhanced channel selection mode for Group2. Refer to Section 22.2.2.2.2 for a
description of the enhanced channel selection mode.
5h Read: Indicates that the enhanced channel selection mode for Group2 is not enabled. The
default sequential channel selection mode is used for Group2 conversions.
Write: Disables the enhanced channel selection mode for Group2 and enables the
sequential channel selection mode.
Ah Read: Indicates that the enhanced channel selection mode for Group2 is enabled.
Write: Enables the enhanced channel selection mode for Group2.
All other values Writing any value other than 5h or Ah to this field has no effect on the selected channel
selection mode for the Group2, and the ADC module continues to use the channel
selection mode that was previously programmed channel selection mode.