Message RAM
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SPNU563A–March 2018
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Controller Area Network (DCAN) Module
27.5.2 Addressing Message Objects in RAM
The starting location of a particular message object in RAM is:
Message RAM base address + (message object number) × 0x20.
This means that Message Object 1 starts at offset 0x0020; Message Object 2 starts at offset 0x0040, and
so on.
NOTE: 0 is not a valid message object number. At address 0x0000, message object number 64 is
located. Writing to the address of an unimplemented message object may overwrite an
implemented message object.
The base address for DCAN1 RAM is FF1E 0000h, DCAN2 RAM is FF1C 0000h, DCAN3
RAM is FF1A 0000h, and DCAN4 RAM base address is FF18 0000h.
Message Object number 1 has the highest priority.
Table 27-3. Message RAM Addressing in Debug/Suspend and RDA Mode
Message
Object
Number
Base Address Offset
Word
Number
Debug/Suspend mode,
see Section 27.5.3
RDA mode,
see Section 27.5.4
1 0x0020 1 Reserved Data Bytes 4-7
0x0024 2 MXtd, MDir, Mask Data Bytes 0-3
0x0028 3 Xtd, Dir, ID ID[27:0], DLC
0x002C 4 Ctrl Mask, Xtd, Dir, ID[28]
0x0030 5 Data Bytes 3-0 Reserved, Ctrl, MXtd, MDir
0x0034 6 Data Bytes 7-4 --
: : : : :
31 0x03E0 1 Reserved Data Bytes 4-7
0x03E4 2 MXtd, MDir, Mask Data Bytes 0-3
0x03E8 3 Xtd, Dir, ID ID[27]:0, DLC
0x03EC 4 Ctrl Mask, Xtd, Dir, ID[28]
0x03F0 5 Data Bytes 3-0 Reserved, Ctrl, MXtd, MDir
0x03F4 6 Data Bytes 7-4 --
: : : : :
63 0x07E0 1 Reserved Data Bytes 4-7
0x07E4 2 MXtd, MDir, Mask Data Bytes 0-3
0x07E8 3 Xtd, Dir, ID ID[27:0], DLC
0x07EC 4 Ctrl Mask, Xtd, Dir, ID[28]
0x07F0 5 Data Bytes 3-0 Reserved, Ctrl, MXtd, MDir
0x07F4 6 Data Bytes 7-4 --
64 0x0000 1 Reserved Data Bytes 4-7
0x0004 2 MXtd, MDir, Mask Data Bytes 0-3
0x0008 3 Xtd, Dir, ID ID[27]:0, DLC
0x000C 4 Ctrl Mask, Xtd, Dir, ID[28]
0x0010 5 Data Bytes 3-0 Reserved, Ctrl, MXtd, MDir
0x0014 6 Data Bytes 7-4 --
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