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SPNU563A–March 2018
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Copyright © 2018, Texas Instruments Incorporated
F021 Level 2 Flash Module Controller (L2FMC)
7.1 Overview
The F021 Flash is used to provide non-volatile memory for instruction execution or data storage. The
Flash can be electrically programmed and erased many times to ease code development.
Refer to the following documents for support on how to initialize and use the on-chip Flash and its API:
• F021 (Texas Instruments 65nm Flash) Flash API Reference Guide (SPNU501)
7.1.1 Features
• Symmetric dual port (Port A and Port B) for higher performance and concurrent access to different
banks from one or more bus masters.
• Read, program and erase with a single 3.3 V supply voltage
• Supports error detection and correction
– Single Error Correction and Double Error Detection (SECDED)
– Error Correction Code (ECC) is evaluated in the CPU.
– Address bits included in ECC calculation
• Provides different read modes to optimize performance and verify the integrity of Flash contents
• Provides software controllable power mode control logic
• Integrated program/erase state machine
– Simplifies software algorithms
– Supports simultaneous read access on up to two banks while performing a write or erase operation
on any one of the remaining banks
– Suspend command allows read access to a sector being programmed/erased
– Fast erase and program times (for details, see the device-specific data sheet
• Allows remapping of Flash to RAM spaces through "Parameter Overlay Module" (POM)
For the actual size of the Flash memory for the device, see the device-specific data sheet.
7.1.2 Definition of Terms
Terms used in this document have the following meaning:
• bw - Normal data space bank data width of a Flash bank. The bw is 256 bits (288 bits including the
error correction bits).
• bwe - EEPROM emulation bank is 64-bit wide (72 bits including the error correction bits).
• Bus Master - Any of CPU, DMA or other modules which can request data access.
• Charge pump: Voltage generators and associated control (logic, oscillator, and bandgap, for example).
• CSM: Program/erase command state machine
• Flash bank: A group of Flash sectors that share input/output buffers, data paths, sense amplifiers, and
control logic.
• FEE - Flash EEPROM Emulation. Features on the L2FMC to support using a Flash type memory in
place of an EEPROM Flash memory. EEPROM is erasable by the word while this Flash memory is
only erasable by the sector. The FEE bank is accessible through the same bus as the main bank (in a
special address range) and always resides in bank 7.
• Flash module: Flash banks, charge pump, and Flash wrapper.
• Flash wrapper: Power and mode control logic, data path, wait logic, and write/erase state machines.
• L2FMC - Level 2 Flash Module Controller.
• Command - A sequence of coded instructions to Flash module to execute a certain task.
• FSM (Flash State Machine) - State machine that parses and decodes FSM commands. It executes
embedded algorithms and generates control signals to both Flash bank and charge pump during the
actual program/erase operation.
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