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EPC Control Registers
495
SPNU563A–March 2018
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Error Profiling Controller (EPC)
12.4.8 Uncorrectable Error Address Register n (UERR_ADDR)
Figure 12-9. Uncorrectable Error Address Register n (UERR_ADDR) (offset = 20h-24h)
31 0
UERR_ADDR
R-0
LEGEND: R = Read only; -n = value after asynchronous reset on power-on reset
Table 12-9. Uncorrectable Error Address Register n (UERR_ADDR) Field Descriptions
Bit Field Description
31-0 UERR_ADDR Register n corresponds to uncorrectable port n. The number of uncorrectable ports is configured through
the generic parameter: Number of EPC uncorrectable ports.
This 32-bit register captures the uncorrectable address error from each EPC-IP uncorrectable interface.
Once EPC-IP interface receives the uerr_valid_x, the corresponding address is captured and frozen. CPU
read (privilege mode) of this address unfreezes this register. EMUDBG read access is non-intrusive (not
unfreeze). Power-on reset, write-clear to the corresponding UERRSTAT bit or reading of the ERRADDR
register also unfreezes this register for each interface. Unfreeze means that the register content can be
updated whenever there is the next uncorrectable error address becomes active on this interface.
12.4.9 CAM Content Update Register n (CAM_CONTENT)
Figure 12-10. CAM Content Update Register n (CAM_CONTENT) (offset = A0h-11Ch)
31 16
CAM_CONTENT
R/WP-0
15 3 2 0
CAM_CONTENT Reserved
R/WP-0 R-0
LEGEND: R/W = Read/Write; R = Read only; WP = Write in privileged mode only; -n = value after synchronous reset on system reset
Table 12-10. CAM Content Update Register n (CAM_CONTENT) Field Descriptions
Bit Field Value Description
31-3 CAM_CONTENT CAM content register n. CPU writes to this field in functional or diagnostic mode. The write data is
masked with byten and stored into CAM on each index. Address A0h corresponds to index 0;
address 11Ch corresponds to index 31. The number of active registers changes depending on the
number of CAM indexes available upon configuration during device integration.
2-0 Reserved 0 Reserved. Reads return 0.
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