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Flash Control Registers
369
SPNU563A–March 2018
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Copyright © 2018, Texas Instruments Incorporated
F021 Level 2 Flash Module Controller (L2FMC)
7.10.17 Flash Module Access Control Register (FMAC)
Figure 7-27. Flash Module Access Control Register (FMAC) (offset = 50h)
31 16
Reserved
R-0
15 3 2 0
Reserved BANK
R-0 R/WP-0
LEGEND: R/W = Read/Write; R = Read only; WP = Write in Privilege Mode; -n = value after reset
Table 7-29. Flash Module Access Control Register (FMAC) Field Descriptions
Bit Field Value Description
31-16 Reserved 0 Reads return 0. Writes have no effect.
2-0 BANK 0-7h Bank Enable.
These bits select which bank is enabled for operations such as local register access, OTP sector
access, and program/erase commands. These bits select only one bank at a time from up to eight
banks depending on the specific device being used. For example, a 000 selects bank 0; 011 selects
bank 3.
Note: BANK can identify up to 8 Flash banks. If BANK is selected for an un-implemented bank,
then the BANK will set itself to the number of an implemented bank. To determine if a bank is
implemented, write the bank number to BANK and read back the value to see if what was written
can be read back.
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