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HTU Control Registers
1173
SPNU563A–March 2018
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High-End Timer Transfer Unit (HTU) Module
24.4.27 Memory Protection Start Address Register 0 (HTU MP0S)
This register configures the start address of memory protection region 0
Figure 24-40. Memory Protection Start Address Register 0 (HTU MP0S) [offset = 74h]
31 16
STARTADDRESS0
R/WP-0
15 2 1 0
STARTADDRESS0 0 0
R/WP-0
LEGEND: R/W = Read/Write; WP = Write in privilege mode only; -n = value after reset
Table 24-40. Memory Protection 0 Start Address Register (HTU MP0S) Field Descriptions
Bit Field Description
31-0 STARTADDRESS0 The start address defines at which main memory address the region begins. A memory protection error
will be triggered, if the HTU accesses an address smaller than STARTADDRESS0 and the MPCS
register is configured accordingly. The address is 32-bit aligned, so the 2 LSBs are not significant and
will always read 0.
24.4.28 Memory Protection End Address Register (HTU MP0E)
Figure 24-41. Memory Protection End Address Register (HTU MP0E) [offset = 78h]
31 16
ENDADDRESS0
R/WP-0
15 2 1 0
ENDADDRESS0 0 0
R/WP-0
LEGEND: R/W = Read/Write; WP = Write in privilege mode only; -n = value after reset
Table 24-41. Memory Protection End Address Register (HTU MP0E) Field Descriptions
Bit Field Description
31-0 ENDADDRESS0 The end address defines at which address the region ends. A memory protection error will be
triggered, if the HTU accesses an address bigger than ENDADDRESS0 and the register bit MPCS
register is configured accordingly. The address is 32-bit aligned, so the 2 LSBs are not significant and
will always read 0. The effective end address is rounded up to the nearest word end address, that is,
0x200 = 0x203.
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