www.ti.com
Memory Test Algorithms on the On-chip ROM
411
SPNU563A–March 2018
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
Programmable Built-In Self-Test (PBIST) Module
9.4 Memory Test Algorithms on the On-chip ROM
This section provides a brief description for some of the test algorithms used for memory self-test.
1. March13N:
• March13N is the baseline test algorithm for SRAM testing. It provides the highest overall coverage.
The other algorithms provide additional coverage of otherwise missed boundary conditions of the
SRAM operation.
• The concept behind the general march algorithm is to indicate:
– The bit cell can be written and read as both a 1 and a 0.
– The bits around the bit cell do not affect the bit cell.
• The basic operation of the march is to initialize the array to a know pattern, then march a different
pattern through the memory.
• Type of faults detected by this algorithm:
– Address decoder faults
– Stuck-At faults
– Coupled faults
– State coupling faults
– Parametric faults
– Write recovery faults
– Read/write logic faults
To Next Page
Loading...
Need help?
General
