Texas Instruments TMS570LC4357

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SPNU563A–March 2018
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Analog To Digital Converter (ADC) Module
22.3.74 ADC Group1 Current Count Register (ADG1CURRCOUNT)
Figure 22-105 and Table 22-80 describe the ADG1CURRCOUNT register.
Figure 22-105. ADC Group1 Current Count Register (ADG1CURRCOUNT) (offset = 1A4h)
31 5 4 0
Reserved G1_CURRENT_COUNT
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 22-80. ADC Group1 Current Count Register (ADG1CURRCOUNT) Field Descriptions
Bit Field Value Description
31-5 Reserved 0 Reads return 0. Writes have no effect.
4-0 G1_CURRENT_
COUNT
CURRENT_COUNT value for the Group1 conversions when enhanced channel selection mode is
enabled. Refer to Section 22.2.2.2.2 for a description of the enhanced channel selection mode.
This register resets to 0 on any of the following conditions:
• A peripheral reset occurs
• An ADC software reset occurs via the ADC Reset Control Register (ADRSTCR)
• G1_CURRENT_COUNT becomes equal to G1_MAX_COUNT
• Application writes zeros to ADG1CURRCOUNT register
• Group1's result RAM is reset
A read from the ADG1CURRCOUNT register returns the value of the current index into the
Group1's look-up table.
22.3.75 ADC Group1 Maximum Count Register (ADG1MAXCOUNT)
Figure 22-106 and Table 22-81 describe the ADG1MAXCOUNT register.
Figure 22-106. ADC Group1 Maximum Count Register (ADG1MAXCOUNT) (offset = 1A8h)
31 5 4 0
Reserved G1_MAX_COUNT
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 22-81. ADC Group1 Maximum Count Register (ADG1MAXCOUNT) Field Descriptions
Bit Field Value Description
31-5 Reserved 0 Reads return 0. Writes have no effect.
4-0 G1_MAX_
COUNT
MAX_COUNT value for the Group1 conversions when enhanced channel selection mode is
enabled. Refer to Section 22.2.2.2.2 for a description of the enhanced channel selection mode.
It is recommended to clear the Group1's CURRENT_COUNT register (ADG1CURRCOUNT)
whenever the G1_MAX_COUNT is changed.