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DCAN Control Registers
1477
SPNU563A–March 2018
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Controller Area Network (DCAN) Module
27.17.22 Interrupt Multiplexer Registers (DCAN INTMUX12 to DCAN INTMUX78)
The IntMux flag determines for each message object which of the two interrupt lines (DCAN0INT or
DCAN1INT) will be asserted when the IntPnd of this message object is set. Both interrupt lines can be
globally enabled or disabled by setting or clearing IE0 and IE1 bits in CAN Control Register.
The IntPnd bit of a specific message object can be set or reset by the CPU via the IF1/IF2 Interface
Register sets, or by Message Handler after reception or successful transmission of a frame. This will also
affect the Int0ID resp Int1ID flags in the Interrupt Register.
Figure 27-53. Interrupt Multiplexer 12 Register (DCAN INTMUX12) [offset = D8h]
31 0
IntMux[32:1]
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Figure 27-54. Interrupt Multiplexer 34 Register (DCAN INTMUX34) [offset = DCh]
31 0
IntMux[64:33]
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Figure 27-55. Interrupt Multiplexer 56 Register (DCAN INTMUX56) [offset = E0h]
31 0
IntMux[96:65]
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Figure 27-56. Interrupt Multiplexer 78 Register (DCAN INTMUX78) [offset = E4h]
31 0
IntMux[128:97]
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 27-24. Interrupt Multiplexer Registers Field Descriptions
Bit Name Value Description
31-0 IntMux[128:1] Multiplexes IntPnd value to either DCAN0INT or DCAN1INT interrupt lines. The mapping from the
bits to the message objects is as follows:
Bit 0 -> last implemented message object.
Bit 1 -> message object number 1
Bit 2 -> message object number 2
0 DCAN0INT line is active if corresponding IntPnd flag is 1.
1 DCAN1INT line is active if corresponding IntPnd flag is 1.
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