HTU Control Registers
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SPNU563A–March 2018
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High-End Timer Transfer Unit (HTU) Module
24.4.15 Request Lost Flag Register (HTU RLOSTFL)
Figure 24-28. Request Lost Flag Register (HTU RLOSTFL) [offset = 40h]
31 16
Reserved
R-0
15 0
CPRLFL
R/W1CP-0
LEGEND: R/W = Read/Write; R = Read only; W1CP = Write 1 in privilege mode to clear the bit; -n = value after reset
Table 24-28. Request Lost Flag Register (HTU RLOSTFL) Field Descriptions
Bit Field Value Description
31-16 Reserved 0 Reads return 0. Writes have no effect.
15-0 CPRLFL CP Request Lost Flags
0 No request was lost. Writing a 0 has no effect.
1 If bit (2*x) is set, a request was lost on CP A of DCP x.
If bit (2*x+1) is set, a request was lost on CP B of DCP x. Reading from INTOFFx in case of a RLOST
interrupt clears the corresponding flag. The state of the flag bit can be polled even if RLINTENA is
cleared.
• Reading CPRLFL will not clear the flags or
• Reading from INTOFFx clears the corresponding flag.
• Writing a 1 clears the corresponding flag.
24.4.16 Buffer Full Interrupt Flag Register (HTU BFINTFL)
Figure 24-29. Buffer Full Interrupt Flag Register (HTU BFINTFL) [offset = 44h]
31 16
Reserved
R-0
15 0
BFINTFL
R/W1CP-0
LEGEND: R/W = Read/Write; R = Read only; W1CP = Write 1 in privilege mode to clear the bit; -n = value after reset
Table 24-29. Buffer Full Interrupt Flag Register (HTU BFINTFL) Field Descriptions
Bit Field Value Description
31-16 Reserved 0 Reads return 0. Writes have no effect.
15-0 BFINTFL Buffer Full Interrupt Flags
0 No buffer full condition is detected. Writing a 0 has no effect.
1 If bit (2*x) is set, a buffer full condition on CP A of DCP x has been detected.
If bit (2*x+1) is set, a buffer full condition on CP B of DCP x has been detected.
The BFINTFL flag is set after the last frame finishes on the corresponding buffer regardless of whether
the buffer is configured to one shot, circular or auto-switch mode. If BFINTFL is set in circular mode,
then a circular overrun has occurred on the corresponding buffer. This can be used to indicate whether
the buffer section after the frozen full address contains valid data or not.
Reading from INTOFFx in case of a buffer-full interrupt clears the corresponding flag. The state of the
flag bit can be polled even if the corresponding interrupt enable bit is cleared.
• Reading BFINTFL will not clear the flags or
• Reading INTOFFx will clear the corresponding flags or
• Writing a 1 clears the corresponding flag.
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