CRC Control Registers
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SPNU563A–March 2018
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Cyclic Redundancy Check (CRC) Controller Module
18.4.14 Channel 1 PSA Signature Low Register (PSA_SIGREGL1)
Figure 18-22. Channel 1 PSA Signature Low Register (PSA_SIGREGL1) [offset = 60h]
31 0
PSASIG1
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 18-18. Channel 1 PSA Signature Low Register (PSA_SIGREGL1) Field Descriptions
Bit Field Description
31-0 PSASIG1 Channel 1 PSA Signature Low Register. This register contains the value stored at PSASIG1[31:0] register.
18.4.15 Channel 1 PSA Signature High Register (PSA_SIGREGH1)
Figure 18-23. Channel 1 PSA Signature High Register (PSA_SIGREGH1) [offset = 64h]
31 0
PSASIG1
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 18-19. Channel 1 PSA Signature High Register (PSA_SIGREGH1) Field Descriptions
Bit Field Description
31-0 PSASIG1 Channel 1 PSA Signature High Register. This register contains the value stored at PSASIG1[63:32] register.
18.4.16 Channel 1 CRC Value Low Register (CRC_REGL1)
Figure 18-24. Channel 1 CRC Value Low Register (CRC_REGL1) [offset = 68h]
31 0
CRC1
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 18-20. Channel 1 CRC Value Low Register (CRC_REGL1) Field Descriptions
Bit Field Description
31-0 CRC1 Channel 1 CRC Value Low Register. This register contains the current known good signature value stored at
CRC1[31:0] register.