Texas Instruments TMS570LC4357

112
SPNU563A–March 2018
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Architecture
Chapter 2
SPNU563A–March 2018
Architecture
This chapter consists of five sections. The first section describes specific aspects of the device
architecture. The second section describes the clocking structure of the microcontrollers. The third section
gives an overview of the device memory organization. The fourth section details exceptions on the device,
and the last section describes the system and peripheral control registers of the microcontroller.
Topic ........................................................................................................................... Page
2.1 Introduction ..................................................................................................... 113
2.2 Memory Organization........................................................................................ 120
2.3 Exceptions....................................................................................................... 139
2.4 Clocks............................................................................................................. 142
2.5 System and Peripheral Control Registers ............................................................ 151