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Overview
849
SPNU563A–March 2018
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Analog To Digital Converter (ADC) Module
22.1 Overview
This microcontrollers implements up to two instances of the ADC module. The main features of the ADC
module are:
• Selectable 10-bit or 12-bit resolution
• Successive-approximation-register architecture
• Three conversion groups – Group1, Group2, and Event Group
• All three conversion groups can be configured to be hardware-triggered; group1 and group2 can also
be triggered by software
• Conversion results are stored in a 64-word memory (SRAM)
– These 64 words are divided between the three conversion groups and are configurable by software
– Accesses to the conversion result RAM are protected by parity
• Flexible options for generating DMA requests for transferring conversion results
• Selectable channel conversion order
– Sequential conversions in ascending order of channel number, OR
– User-defined channel conversion order with the Enhanced Channel Selection Mode
• The Enhanced Channel Selection Mode is only available to ADC1.
• Single or continuous conversion modes
• Embedded self-test logic for input channel failure detection (open / short to power / short to ground)
• Embedded calibration logic for offset error correction
• Enhanced Power-down mode
• External event pin (ADEVT) to trigger conversions
– ADEVT is also programmable as general-purpose I/O
• Eight hardware events to trigger conversions
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