ESM Control Registers
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SPNU563A–March 2018
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Error Signaling Module (ESM)
16.4.15 ESM Error Key Register (ESMEKR)
Figure 16-25. ESM Error Key Register (ESMEKR) [offset = 38h]
31 16
Reserved
R-0
15 4 3 0
Reserved EKEY
R-0 R/WP-0
LEGEND: R/W = Read/Write; R = Read; WP = Write in privileged mode only; -n = value after reset
Table 16-17. ESM Error Key Register (ESMEKR) Field Descriptions
Bit Field Value Description
31-4 Reserved 0 Reads return 0. Writes have no effect.
3-0 EKEY Error Key. The key to reset the ERROR pin or to force an error on the ERROR pin.
User and privileged mode (read):
Returns current value of the EKEY.
Privileged mode (write):
0 Activates normal mode (recommended default mode).
5h The ERROR pin set to high when the low time counter (LTC) has completed; then the EKEY
bit will switch back to normal mode (EKEY = 0000)
Ah Forces error on ERROR pin.
All other values Activates normal mode.
16.4.16 ESM Status Shadow Register 2 (ESMSSR2)
This register is dedicated for Group2.
Figure 16-26. ESM Status Shadow Register 2 (ESMSSR2) [offset = 3Ch]
31 16
ESF
R/W1CP-X/0
15 0
ESF
R/W1CP-X/0
LEGEND: R/W = Read/Write; W1CP = Write 1 to clear in privilege mode only; -n = value after reset/PORRST; X = value is unchanged
Table 16-18. ESM Status Shadow Register 2 (ESMSSR2) Field Descriptions
Bit Field Value Description
31-0 ESF Error Status Flag. Shadow register for status information on pending error.
Read in User and Privileged mode. Write in Privileged mode only.
0 Read: No error occurred.
Write: Leaves the bit unchanged.
1 Read: Error occurred.
Write: Clears the bit. ESMSR2 is not impacted by this action.
Note: Errors are stored until they are cleared by the software or at power-on reset (PORRST).
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