GIO Control Registers
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SPNU563A–March 2018
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General-Purpose Input/Output (GIO) Module
25.5.6 GIO Interrupt Flag Register (GIOFLG)
The GIOFLG register contains flags indicating that the transition edge (as set in GIOINTDET and GIOPOL
registers) has occurred. The flag can be cleared by the CPU writing a 1 to the flag that is set. The flag is
also cleared by reading the appropriate interrupt offset register (GIOOFF1 or GIOOFF2). Figure 25-12 and
Table 25-9 describe this register.
Figure 25-12. GIO Interrupt Flag Register (GIOFLG) [offset = 20h]
31 24 23 16
GIOFLG 3 GIOFLG 2
R/W1C-0 R/W1C-0
15 8 7 0
GIOFLG 1 GIOFLG 0
R/W1C-0 R/W1C-0
LEGEND: R/W = Read/Write; W1C = Write 1 to clear; -n = value after reset
Table 25-9. GIO Interrupt Flag Register (GIOFLG) Field Descriptions
Bit Field Value Description
31-24 GIOFLG 3 GIO flag for pins GIOD[7:0]
0 Read: A transition has not occurred since the last clear.
Write: Writing a 0 to this bit has no effect.
1 Read: The selected transition on the corresponding pin has occurred.
Write: The corresponding bit is cleared to 0.
Note: This bit is also cleared by a read to the corresponding bit in the appropriate offset
register.
23-16 GIOFLG 2 GIO flag for pins GIOC[7:0]
0 Read: A transition has not occurred since the last clear.
Write: Writing a 0 to this bit has no effect.
1 Read: The selected transition on the corresponding pin has occurred.
Write: The corresponding bit is cleared to 0.
Note: This bit is also cleared by a read to the corresponding bit in the appropriate offset
register.
15-8 GIOFLG 1 GIO flag for pins GIOB[7:0]
0 Read: A transition has not occurred since the last clear.
Write: Writing a 0 to this bit has no effect.
1 Read: The selected transition on the corresponding pin has occurred.
Write: The corresponding bit is cleared to 0.
Note: This bit is also cleared by a read to the corresponding bit in the appropriate offset
register.
7-0 GIOFLG 0 GIO flag for pins GIOA[7:0]
0 Read: A transition has not occurred since the last clear.
Write: Writing a 0 to this bit has no effect.
1 Read: The selected transition on the corresponding pin has occurred.
Write: The corresponding bit is cleared to 0.
Note: This bit is also cleared by a read to the corresponding bit in the appropriate offset
register.
NOTE: An interrupt flag gets set when the selected transition happens on the corresponding GIO pin
regardless of whether the interrupt generation is enabled or not. It is recommended to
clear a flag before enabling the interrupt generation for a transition on the corresponding GIO
pin.
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