ADC Registers
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SPNU563A–March 2018
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Analog To Digital Converter (ADC) Module
22.3.72 ADC Event Group Current Count Register (ADEVCURRCOUNT)
Figure 22-103 and Table 22-78 describe the ADEVCURRCOUNT register.
Figure 22-103. ADC Event Group Current Count Register (ADEVCURRCOUNT) (offset = 19Ch)
31 5 4 0
Reserved EV_CURRENT_COUNT
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 22-78. ADC Event Group Current Count Register (ADEVCURRCOUNT) Field Descriptions
Bit Field Value Description
31-5 Reserved 0 Reads return 0. Writes have no effect.
4-0 EV_CURRENT_
COUNT
CURRENT_COUNT value for the Event group conversions when enhanced channel selection mode
is enabled. Refer to Section 22.2.2.2.2 for a description of the enhanced channel selection mode.
This register resets to 0 on any of the following conditions:
• A peripheral reset occurs
• An ADC software reset occurs via the ADC Reset Control Register (ADRSTCR)
• EV_CURRENT_COUNT becomes equal to EV_MAX_COUNT
• Application writes zeros to ADEVCURRCOUNT register
• Event group's result RAM is reset
A read from the ADEVCURRCOUNT register returns the value of the current index into the Event
group's look-up table.
22.3.73 ADC Event Group Maximum Count Register (ADEVMAXCOUNT)
Figure 22-104 and Table 22-79 describe the ADEVMAXCOUNT register.
Figure 22-104. ADC Event Group Maximum Count Register (ADEVMAXCOUNT) (offset = 1A0h)
31 5 4 0
Reserved EV_MAX_COUNT
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 22-79. ADC Event Group Maximum Count Register (ADEVMAXCOUNT) Field Descriptions
Bit Field Value Description
31-5 Reserved 0 Reads return 0. Writes have no effect.
4-0 EV_MAX_
COUNT
MAX_COUNT value for the Event group conversions when enhanced channel selection mode is
enabled. Refer to Section 22.2.2.2.2 for a description of the enhanced channel selection mode.
It is recommended to clear the Event group's CURRENT_COUNT register (ADEVCURRCOUNT)
whenever the EV_MAX_COUNT is changed.
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